The present invention relates, in general, to semiconductor devices and, more particularly, to an isolation structure for a semiconductor device.
Mixed-mode integrated circuits (ICs) combine digital and analog devices on a single semiconductor substrate. One of the most significant problems faced when combining such devices is noise coupling from one device to another through the common substrate in which the devices are formed (this noise coupling is also hereinafter referred to as "cross-talk"). Because all components of the IC are formed in a common conductive substrate, any noise introduced into the substrate by one component is transmitted to the other components through the substrate. Thus, for example, sensitive analog elements on a mixed-mode IC are vulnerable to malfunction due to their placement on the common substrate adjacent to noise-generating digital devices. Moreover, as mixed-mode ICs continue to combine an increasing variety of device types onto a single substrate and use smaller geometry linewidths, the problem of cross-talk becomes even more severe.
Several techniques have been used in the past to limit cross-talk. One prior approach described by Reuss et al. in U.S. Pat. No. 5,268,312 (entitled "METHOD OF FORMING ISOLATED WELLS IN THE FABRICATION OF BICMOS DEVICES", issued Dec. 7, 1993, having a common inventor with the present application, and commonly assigned to Motorola, Inc.), which is hereby incorporated by reference in full, uses fully isolated wells to minimize cross-talk in bipolar-complementary metal oxide semiconductor (BiCMOS) ICs. Simply stated, this prior approach isolates p-type wells (p-wells) from the substrate by fully surrounding each p-well by a continuous n-type region. One problem, however, is that the isolation provided by such a fully-isolated well decreases in effectiveness at higher frequencies, for example greater than 50 MHz. For circuits operating at these higher frequencies, an improved structure providing further reduction in cross-talk than possible with a fully-isolated well is desirable.
Another limitation of a fully-isolated well is the need for a separate internal contact for each well. Because a fully-isolated well is completely isolated from the substrate, an internal contact is required for each well. These internal contacts are used to tie the wells to ground or another appropriate bias voltage as needed for electrical isolation, but these internal contacts often require additional layout area on the IC.
Accordingly, there is a need for an improved isolation structure for an IC that provides improved reduction in cross-talk between noise-generating devices and noise-sensitive devices at higher frequencies and that does not require an internal contact for each isolation well.